In RF communication systems, clock signals may be used for a number of different purposes. RF communication systems require good clock signals to work properly.
In an RF mobile terminal, RF clock signals may be created on-chip by phase-locked-loops (PLLs) locking at an external crystal resonator as a reference clock input with different dividing factors. For transmitter and receiver circuits running at different frequencies, normally at least two PLLs are needed in an RF integrated circuit (IC). For some mobile terminals, such as mobile terminals that support multiple RF communication standards (e.g., WLAN, Bluetooth, GPS, etc.) additional RF clock signals, and hence additional PLLs, may be needed. Further, in some suggested radio standards, in order to increase communication data rate, carrier aggregation is suggested, in which additional RF clock signals may be required.
Creating many RF clocks using PLLs, however, is not an easy task. When several PLLs are integrated into a single chip, it can become problematic as the PLLs may interfere with each other, degrading the performance of the PLLs. Interference between PLLs may depend on the physical distance between the PLLs and the frequency difference between the PLLs.
Techniques are known for creating additional RF clock signals without adding a new PLL. One such technique uses an up-converter to convert input modulation clock signals and a local RF clock signal into the desired RF clock signal, where the frequency of the desired RF clock signal, fc, is equal to either f0+fm or f0−fm. For simplicity, here we only discuss the situation in which fc=f0+fm, assuming that fm can be either positive or negative. Here, fo is the frequency of the local RF clock signal and fm is the fundamental frequency of the input modulation clock signal. In practice, however, the signal output from the up-converter is not an ideal signal, and instead of creating a single tone clock signal spectrum, it may also generate undesired tones in its spectrum, expressed as:
      S    ⁡          (      f      )        =            ∑                        i          =          0                ,            ni        ⁢                  ∑                  j          =                      -            nj                          nj            ⁢              β        ⁢                                  ⁢        ij        ⁢                                  ⁢        δ        ⁢                                  ⁢                              (                          f              -                              i                ·                                  f                  0                                            -                              j                ·                                  f                  m                                                      )                    .                    In this equation, i, j, ni and nj are integers. The energy of the clock signal created is limited, so βij can become extremely small for large i and j. Setting ni and nj to five would, in most cases, be sufficient to account for most significant tones. When i=1 and j=1, the tone for the created clock signal, the desired tone, fc=f0+fm, is generated. Similarly, when i=1 and j=−1, the tone for the created clock signal, the desired tone, fc=f0−fm, is generated. The other created tones are spurious tones (i.e., unwanted tones). The most harmful of these tones may be the tones that are close to the created clock tone. For example, when i=1 and j=1 is the desired clock tone, the tones created at i=1 and j={−5, −4, −3, −2, −1, 0, 2, 3, 4, 5} are harmful. Here, these tones are referred to as modulation tones, as they are created by the non-linearity in handling the modulation signal. Other tones, created when i≠1, are referred to as harmonic tones, and they are normally located at the centers or neighborhood of the harmonics of RF clock f0.
When generating additional RF clock signals using an up-converter, it is desirable to eliminate the undesirable modulation and harmonic tones as much as possible.